AD9545 Evaluation Board (EVAL-AD9545) Survival Guide

The AD9545 is a great chip with quite unique features, including the 1PPS jitter-cleaning lock. If you dig deeper, you'll find that you need to provide your own TCXO/OCXO and use AuxDPLL for system clock compensation to manage that—but that's fine, we're seasoned, so it’s all right.

For your setup, you have the DPLL set for 50mHz loop bandwidth. For this low loop bandwidth, the XTAL for the system clock is not stable enough. This type of application will require a very stable TCXO or OCXO to use in conjunction with the system clock.

I would recommend applying a frequency source that is very stable over temperature and use the "AuxDPLL" for the system clock compensation. This can be done in the GUI software. You can send the signal to an unused reference input. For the AUXDPLL, the loop bandwidth can be set ~50Hz. Once that is locked, choose to apply the system clock compensation to DPLL0 and the TDCs. 

You'll also need to disregard the AD9545 Evaluation Board User Guide, which states:

By default, the AD9545 system clock input is configured to the on-board 49.152 or 50 MHz crystal

The crystal actually provided is 52MHz, as you can see if you flip the board around.

Additionally, you will need to purchase the SN65LVDS4EVM LVDS Receiver board, as the AD9545 Evaluation Board is wired with "LVDS-compatible outputs," which are quite difficult to use to drive any "regular" logic (at least by my definition of regular).

However, the final step to "win" this AD9545 game, no matter how hard you try to avoid it, will be... unsoldering components.

You definitely need to remove the R318 and R319 50-Ohm termination resistors. Analog Devices has gone the extra mile to make REF B/BB as "normal" as possible:

In contrast, REF B/BB (Connectors J302 and J303, respectively) are configured for single-ended CMOS inputs by default. Each reference input logic type is configurable via the evaluation software. REF B is intended for a DC-coupled, 1.8V/1.2V CMOS input and is terminated with only a 50Ω resistor to ground. REF BB is intended for a either a DC-coupled, 5V CMOS input, and the on board voltage divider will decrease the input amplitude to 1.8V, or a 3.3V CMOS input which will be reduced to a 1.2V CMOS signal.

At the last moment, they made a misstep by using those 50-Ohm resistors. Both inputs are 50-Ohm terminated. While I can drive these 50-Ohm terminated CMOS inputs with my signal generator, they completely disrupt signals coming from standard logic (like microprocessors). I understand that in the RF world or for extremely high-frequency clocks, 50-Ohm termination makes sense, but it doesn’t align with the 'CMOS input' claims in the documentation. And as for the voltage dividers mentioned? I don't see any on my board.

So, be cautious when driving REF B/BB. Maybe they're assuming a 50-Ohm source resistance, which would result in a 6 dB attenuation with the 50-Ohm termination, reducing 3.3V to 1.8V. But that's making too many assumptions for my liking. I removed those resistors, and now the inputs work fine with standard logic.

I realize I may not be the typical user of this board. Still, I want to use this PLL for its intended purpose - processing 1PPS signals (from a GPS, for example) and generating synchronized clocks for microprocessors. The AD9545 Evaluation Board User Guide does hint that Analog Devices had users like me in mind, so I’m not sure where things went wrong. Needing to desolder components to achieve basic functionality seems excessive - adjusting jumpers is one thing, but desoldering feels like a step too far.

Measuring Double Mosfet 4A Ideal Diode Module

10 "DC 3-30V 4A Ideal Diode Module RDS MOSFET Battery Charger Anti Reverse Connection Power Protection Board Module" just arrived today from Amazon and I decided to measure it to figure out what it really does. I tried to find a schematic but I couldn't find one. Here's one I reverse engineered that might have mistakes but it should mostly be there.

The capacitor is likely something small like 1uF. It uses something like this for BJT and two FDS4435 MOSFETs. I applied a 4V peak to peak sin signal on it and I get nothing in the output.

That's not how an ideal diode works and that's something to be aware of. With a tiny bit larger signal e.g. +/-2V5 sine wave it works as expected and you can also see the effect of the capacitor (under no load).

If you find the double-MOSFET setup a bit puzzling, here's some discussion on the topic.

Exploring the ThinkPulse Active Electrodes: Experimental Findings and Observations

The ThinkPulse Active electrodes are pretty interesting especially when combined with the Ultracortex "Mark IV" EEG Headset. The combination makes this cool technology accessible to a wider audience. I wasn't able to find clear and concise documentation about those electrodes beyond Ultracortex's setup instructions. I conducted a series of experiments to characterize the device’s behavior.

Experimental Setup

The ThinkPulse features three pins: black, red, and white. The black pin is the negative power supply which I set to -2.5V, and the red pin the positive supply which I set to +2.5V. I don't know the full-range of this voltage supply and I wouldn't risk damaging the electrode by trying anything larger than this. The white pin outputs the signal.

With this setup, I connected the device to a signal generator, testing various input amplitudes and frequencies to assess the performance.

Key Findings

1. Gain Characteristics: The ThinkPulse exhibits a gain of 0 dB, indicating that the output signal maintains the same amplitude as the input signal. This result aligns with the available online data, which suggests the device does not provide amplification. As such, the main benefit is the very low output impedance, that helps drive the signal over the long cables between the electrode and the main amplifier. 

2. Frequency Response: As expected, the output begins to lag behind the input as the frequency increases. However, this lag remains within acceptable limits up to frequencies around 30 kHz.

3. Amplitude Response and Distortion: I observed no visible distortion in the output signal at amplitudes up to 3.4 V peak-to-peak (Vpp). This is promising, particularly for low-voltage signals like those used in EEG applications, which typically fall within the millivolt range. However typically there will be still a need for ground or bias electrode because as soon as the input signal exceeds the ±2V range, significant distortion occurs.

4. DC coupled: Yes, it is.

I hope you find this information useful for your ThinkPulse Active Electrode exploration.

References

The "Dry and Flexible Active Electrode for EEG Measurement Sensor Documentation" was invaluable.

Another key resource is this video along with the OpenBCI Cyton and Daisy board schematics.

The video has one inaccurate instruction though. It says to connect the active electrodes to the "top row" in Cyton, but they need to be connected to the bottom row instead. The bottom row corresponds to the N(egative) inputs of the amplifiers. As per wjcroft here, "On the Cyton this is the default and the plus pins are connected together and available on the SRB2 pin (closest to the board.) The minus pins then are placed on the scalp. And the SRB2 connected to an ear lobe." Later on the video, we also see that earlobe is connected to SRB2 (bottom row).

This also matches the OpenBCI documentation that says: "turn BIAS and SRB1 to NO and OFF". It also says "Disconnect the BIAS earclip from the Cyton board." I'm not sure about this. On the video it shows something different and it would make sense to have a Ground connection. But, due to low impedance of active electrodes, it might be that BIAS doesn't add any significant value. I can also see the point of tying the bias electrode to the ground, either by configuration, or by placing the electrode to a ground pin. The most accurate configuration, though, for me, would be to use N e.g. 8 active electrodes as regular channels and one active electrode for Reference (SRB2) and one ear clip to connect to Ground (or active bias). I don't see why a (non-active, high impedance) reference electrode wouldn't pick lots of noise and that would affect every other channel because it's used as differential reference.

It should be quick and easy to test these configurations and see what gives less noise.

Getting Started with Jetson Orin Nano (Development Kit) for Real

This is the official NVidia getting started guide. But There are so many things that are conveniently omitted from that guide.

To get Jetson Orin Nano (Development Kit) running, you have to buy:

* An SD card

* An DisplayPort to HDMI Adapter (4K DP to HDMI Adapter) (see discussion here)

What is called "flashing" the SD card isn't really what we all mean by flashing...

> If using JetPack 6.x SD Card image for the first time, you will need to update the QSPI bootloaders by installing JetPack 6 on your SD Card using SDK Manager, which will update the QSPI bootloaders as well. Please note that this is a one time requirement only. Once the QSPI bootloaders are updated, you can use JetPack 6.x SD card images for any future releases.

> Whether you have the SD card image or not, you will always need an Ubuntu PC to update the QSPI memory on the module, so the bootloader is compatible with JetPack 6, which is not possible with a Windows PC.

- Installing Jetpack 6.0 on New Orin Nano with SD Card Image Method

The guide with the actual way more involved process can be found here. You have to download and install the SDK Manager. See here.

To do this, there are some Docker containers which might work but highly likely they won't work. After you install Docker to work with WSL and all that jazz, you might end up with a screen like this:

What you really need is an Ubuntu 22.04 Windows PC at this point and time. As soon as you turn your old laptop to a dual-boot Ubuntu, you are about to start making progress on "flashing".

Flashing doesn't mean using an SD card writer to write an image (e.g. with balenaEtcher). You will have to run the manager and connect the Jetson Orin Nano to the PC with a USB-C to -whatever your old laptop has connector, and then you have to put Jetson Orin Nano in Force Recovery Mode. To do that you need to have the SD card in the Jetson Orin Nano and put a jumper while you boot the device on pins 9 and of the jumper header that is (barely visible) under the GPU. J14 is NOT the 40-position easily accessible jumper you see on the right of the device. After you do that, the SDK Manager will download software for about an hour and do various operations. At some point, it will start to flash an image to Jetson Orin Nano. Then it will try to connect with SSH over the USB and install additional software. This might not work at first. Be sure to fill-in your passwork correctly and be patient and wait for Jetson Orin Nano to (quietly) reboot while the SDK Manager retries to connect. This might take a couple of stressful minutes. Then there will be more transfers for a while.

At the end of this process the Jetson Orin Nano will be successfully flushed.

It will have some software in it, but it's not the best installation I've seen. You will need to update Python venv with apt get. You will also need a browser like chromium-browser. Do not use the original Tensorflow releases - you might get errors like "ERROR: Failed building wheel for h5py" (e.g. here) or not getting to see any GPU (e.g. here). Jetson Orin Nano works easier with the custom NVidia builds for Orin - something like this:

$ sudo pip3 install --extra-index-url <url> tensorflow==<VERSION>

You also have to install prerequisites. The URL/tensorflow on the page above might not be the latest available. Here's an example of installation with a more recent version (v60dp), today.

Note also that nvidia-smi is present but won't work because the GPU isn't connected through PCI. People suggest to use the "deviceQuery" example, but don't be surprised if you don't find it on Jetson Orin Nano. Maybe htop or jtop will give better results as described here.